Phase Change Memory (PCM) is an emerging dense, high speed, and scalable non-volatile memory that utilizes resistivity contrast of the crystalline and amorphous phases of phase change materials such as GST (Ge2Sb2Te5). The large resistance contrast between the amorphous and crystalline states in PCM enables storage of multiple bits per cell (MLC) for ultra-high density memory.1 However, a major difficulty for MLC using PCM is the resistance drift that is observed in these materials and devices, which causes mixing of different resistance levels in the long run.
The resistance of the amorphous GST increases with time and eventually decreases due to recrystallization.2 The upward resistance drift has often been explained using structural relaxation, without accounting for the electrostatic perturbations caused by the crystals nucleated in the amorphous matrix.3 According to our hypothesis, both the upward and downward resistance drift can be explained by nucleation and growth of crystallites: The nuclei composed of narrow band-gap FCC inside the wide bandgap amorphous matrix are potential wells that trap positive free carriers; locally perturbing the potential profile and lead to charge carrier depletion around the nuclei. This decreases the conductivity of the surrounding amorphous material and increases overall resistance. Once the crystallites grow large enough to initiate percolation transport, resistance starts to decrease.
We have investigated the drift of resistance in amorphous GST due to nucleation using our finite element model that simulates the amorphization-crystallization dynamics in COMSOL Multiphysics.4,5 The depletion region around the charged nuclei is modeled by introducing a thin (~2nm thick) and highly resistive ring around each nucleus. As the number of seed crystallites increases, there is an initial increase of resistance, but as they grow larger, a percolation path is formed and resistance drops. Computational results showing first upward and then downward resistance drift and resistance fluctuations at various temperatures will be presented.
1 N. Papandreou, A. Pantazi, A. Sebastian, M. Breitwisch, C. Lam, H. Pozidis, and E. Eleftheriou, in 2010 IEEE Int. Conf. Electron. Circuits, Syst. ICECS 2010 - Proc. (2010), pp. 1017–1020.
2 F. Dirisaglik, G. Bakan, Z. Jurado, S. Muneer, M. Akbulut, J. Rarey, L. Sullivan, M. Wennberg, A. King, L. Zhang, R. Nowak, C. Lam, H. Silva, and A. Gokirmak, Nanoscale 7, 16625 (2015).
3 D. Ielmini, S. Lavizzari, D. Sharma, and A.L. Lacaita, Tech. Dig. - Int. Electron Devices Meet. IEDM 939 (2007).
4 Z. Woods and A. Gokirmak, IEEE Trans. Electron Devices 64, 4466 (2017).
5 Z. Woods, J. Scoggin, A. Cywar, L. Adnane, and A. Gokirmak, IEEE Trans. Electron Devices 64, 4472 (2017).