EN08.04.05 : Silicon Degradation in Monolithic II-VI/Si Tandem Solar Cells

5:00 PM–7:00 PM Apr 3, 2018

PCC North, 300 Level, Exhibit Hall C-E

Kevin Tyler1 Madhan Arulanandam1 Ramesh Pandey2 Jennifer Drayton2 Abhinav Chikhalkar1 James Sites2 Richard King1

1, Arizona State University, Tempe, Arizona, United States
2, Colorado State University, Fort Collins, Colorado, United States

Incorporating the two most widely used solar cell materials, II-VI/Si tandem cells based on CdTe and silicon have the potential to exhibit high efficiencies at a low cost. Silicon especially proves to be an attractive bottom cell material due to its ideal bandgap of 1.12 eV and already well-established industry. Unfortunately, during the deposition of CdTe and other II-VIs on silicon, the silicon lifetime can degrade. The degradation has also been seen in other groups depositing III-V materials on silicon, as well as across various deposition methods. The exact nature of this degradation and the extent to which it occurs is not yet fully understood.
To this end, we are studying the degradation mechanisms in the silicon on bare wafers, wafers with CdTe deposition, and wafers with IZO and CdTe deposition. A contaminant-free rapid thermal annealing system has been used to mimic in bare silicon the temperature profile during CdTe deposition, demonstrating no discernable degradation in the bare silicon between 350 and 600 C at 3 minute anneals. An HF-nitric-acetic clean was done for 5 minutes with a 10-minute rinse before annealing, as well as before 25 nm of a-Si deposition to measure lifetime. N-type silicon lifetimes ranged from 1 to 2.4 milliseconds, with non-annealed wafers all falling within the same range.
We will report on the degradation of silicon bulk lifetime with CdTe deposition as a function of temperature from 350 to 600 C. Higher temperatures typically result in greater silicon lifetime degradation, yet also may be required for the best CdTe, MgCdTe, and ZnCdTe top cells. The primary suspects in lifetime degradation are the metallic impurities Cd and Te, and, if present, Mg and Zn. The surface recombination velocity is passivated by removing the II-VI films and depositing a-Si:H to form a silicon heterojunction; the separation of surface and bulk recombination components will be reported. To test the extent that impurities have diffused into the bulk wafer, we will additionally etch off 5-40 microns of silicon on each side, and remeasure the silicon lifetime.
Secondary ion mass spectroscopy (SIMS) analyses will also be presented to quantify the concentration and depth of Cd, Te, and other impurities in the silicon wafer. Deep-level transient spectroscopy (DLTS) will give information on the energy level, distribution, and cross section of the recombination centers created by these defect atoms, aiding in their identification and the understanding of the lifetime degradation mechanism.
Finally, the introduction of the IZO layer between the silicon and cadmium telluride during deposition is expected to act as a diffusion barrier and help preserve the silicon lifetime. The extent of this benefit will be quantified using the characterization techniques listed above. The knowledge gained from this study will help in the ultimate goal of creating a high-efficiency, low-cost II-VI/Si tandem solar cell.