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Huai-Yu Cheng1 2 Wei-Chih Chien1 2 I-Ting Kuo1 2 Matthew BrightSky3 2 Hsiang-Lan Lung1 2

1, Macronix International Co., Hsinchu, , Taiwan
2, IBM/Macronix PCRAM Joint Project, Yorktown Heights, New York, United States
3, IBM T. J. Watson Research Center, Yorktown Heights, New York, United States

Research of emerging nonvolatile memory (NVM) technologies, such as phase-change memory (PCM) and resistive memory (RRAM) have been motivated by exciting applications such as storage class memory (SCM). SCM would fill up the performance gap between access memory, like DRAM, and the storage memory, like NAND. To be able to serve as SCM, PCM needs to achieve reasonably high endurance (>3x108 cycles) and read or write access time of < 100 ns is required [1].
The development of phase-change materials for PCM follows the materials originally developed for phase-change rewritable optical storage in the past two decades. Today almost all phase change memory IC’s still use Ge2Sb2Te5 (GST-225) inherited from optical disk technology. Although GST-225 is a fast switching material it suffers large volume change when melting thus limiting cycling endurance. Thus far, attempts to improve the endurance must sacrifice switching speed. Additionally, SCM technology requires PCM densely packed in vast “crosspoint” arrays with selecting devices to achieve high density and high endurance performance. A suitable selector is of primary importance. Ovonic Threshold Switching (OTS) selector is one of the promising candidates, that is based, as PCM is, on chalcogenide materials [2] giving it analogous physical and electrical properties. Chalcogenides based on Te-As-Ge-Si system have been demonstrated for a selector device since 1968 [2] and have been the primarily studied materials. However, insufficient cycling endurance and low thermal stability remains a key hurdle that inhibits these materials to be used in a large crosspoint arrays. During this talk I will focus on these two key aspects of PCM technologies for SCM applications.
In the first part of this talk, we will show the phase change material by engineering the doping into GST. Our 128Mb test chip has demonstrated 20 ns SET speed, 1E9 cycling endurance and 65% reset current reduction for engineered material compared to GST-225.
In the second part of this talk, we will show the improvement of TeAsGeSi OTS material by incorporation of Se and another dopant (<5 at%). Modification of chalcogenide composition show conflicting requirements where high Vth materials always show low IOFF with strong dependence on the composition. Therefore, additional thickness and process temperature control are needed to further adjust the selector performance for different materials. By optimizing the composition, thickness and process temperature, a thermally stable patterned selector device that exhibited reliable switching characteristics even after 350oC/30 mins annealing, compatible with IC Back-End-Of-Line (BEOL) temperature budget is demonstrated. It shows more than 1010 cycling endurance at 420 uA ON-current, low IOFF (~1.9 nA @ 1V), moderate Vth (2.2V), which is suitable for SCM applications.
[1] R. F. Freitas and W. W. Wilcke, IBM J. Res. & Dev., 52, 439 (2008).
[2] S. R. Ovshinsky, Phys. Rev. Lett., 21, 1450 (1968)

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