GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) are very promising for high-efficiency electrical power management systems. Thanks to its insulated gate, the MIS-HEMT offers low gate leakage and large gate swing, essential for power switching applications. Unfortunately, the gate dielectric introduces reliability and instability concerns. These issues are hampering technology commercialization.
A critical problem in GaN MIS-HEMTs is bias-temperature instability (BTI), in which important device parameters, in particular the threshold voltage, VT, shift around under prolonged gate bias stress. This is detrimental to circuit performance. BTI in MIS-HEMTs is challenging to understand because the gate-stack has multiple layers and interfaces with many possible trapping sites raising the possibility of multiple mechanisms acting simultaneously.
To contribute fundamental understanding relevant to this problem, we have studied BTI in simpler GaN MOSFETs. This has allowed us to isolate the role of the gate oxide and the oxide/GaN interface in BTI. We have focused on the evolution of VT, maximum transconductance (gm,max), and drain current subthreshold swing (S). Often, BTI studies separately focus on positive stress (PBTI) or negative stress (NBTI) with often contradictory results. Our research has addressed the PBTI-NBTI continuum and has strived to build a unified model for device instability.
Our results show a universal, continuous, symmetrical, and reversible VT shift and gm,max change as gate voltage swings through a moderate range around 0 V. The time evolution of VT is well described by a power law model. The observed voltage, time, and temperature dependences suggest that for moderate gate bias stress, NBTI and PBTI in our devices are due to a single reversible mechanism. Its signature is consistent with electron trapping and detrapping in preexisting oxide traps that form a defect band very close to the GaN/oxide interface. This defect band extends in energy beyond the conduction band edge of GaN and below the Fermi level at the channel surface at 0 V.
Harsher stress, positive or negative, is seen to lead to irreparable damage that permanently degrades the device figures of merit and accumulates with stress time. In both cases, positive or negative stress, the permanent damage appears to be caused by interface state density creation at the oxide/semiconductor interface, perhaps due to H broken bonds.
An additional regime of degradation is observed under mid-level negative gate stress. Here we record a recoverable positive VT shift coupled with a recoverable increase in subthreshold swing. We attribute this to electron trapping in the GaN channel under the edges of the gate. This is an excellent example of how semiconductor trapping can confuse gate oxide-related degradation studies and how challenging is to develop a holistic understanding behind BTI in GaN MIS-HEMTs.