Jun Tao1 Debarghya Sarkar1 Rehan Kapadia1

1, University of Southern California, Los Angeles, California, United States

Since the preliminary investigation of neuromorphic computing, numerous advanced materials, devices, and systems were used or proposed to emulate neural network in human brain aimed at lower power consumption, higher fault-tolerant, and better ability of dynamic learning than conventional computing. Commercial level neuromorphic circuits based on the complementary metal-oxide-semiconductor (CMOS) are already accessible, which consists of 6 to 12 transistors each unit depending on the specific functionality and robustness of the design. However, the higher energy consumption and physical area have led researchers to look for architectures based on single device and novel materials.
In our work, we demonstrate a fully scalable fabrication of Indium phosphide (InP) channel transistors from templated films of InP grown directly on Si/SiO2 wafer using thin-film vapor-liquid-solid growth. Several significant synaptic characteristics such as elasticity, short- and long-term plasticity, metaplasticiy, spike number dependent plasticity and spike timing dependent plasticity have been mimicked, by modeling gate electrode as the pre-synaptic axon terminal, the drain electrode as the post-synaptic dendrite, and the gate oxide-semiconductor channel as the synapse, in which FET channel conductance was interpreted as the synaptic weight.
Controlling the charging and discharging of interfacial traps in the MOS structure allows us to engineer hysteresis of the channel conductance to customize the synapse behavior and modify the synapse weight non-linearly. It underpins optimal selectivity of signal transduction and satisfies the key neuromorphic architecture characteristic--changing the properties of the device depending on its history, which is also relating to the procedure of “learn”.
Manipulating the hysteresis in a family of transfer characteristics, in spike timing dependent plasticity (STDP) emulation, we attain maximum potentiation (depression) for the minimum positive (negative) interval time, which gradually decays down to give elasticity, as we expected. This buttresses the scalable InP channel transistors on silicon as promising devices and platform for neuromorphic computation.