John Paul Strachan1 Suhas Kumar1

1, Hewlett Packard Labs, Palo Alto, California, United States

The future acceleration of many computational workloads is expected to depend on novel architectures, circuits, and devices. I describe an effort utilizing the analog nature of memristor crossbar arrays to accelerate vector-matrix multiplication, which underpins many applications in image and signal processing, neural networks, and scientific computations. Significant improvement over CPUs, GPUs, and custom ASICs is anticipated using such systems. I describe our work spanning atomic understanding and engineering of memristors, integration with CMOS circuits, fine programming control over memristors, and experimental implementations of neural networks, image and time-series data processing, error-robust operations.

Additionally, I will describe other applications of memristor technology for mimicking the neuronic behavior in neuromorphic systems, in addition to the synaptic functions. This work begins with our investigations of niobium oxide-based systems, including x-ray based physical characterization and emulation of neuron-like spiking behaviors. As devices were further scaled down to below 100 nm in lateral dimension, interesting dynamics was observed that we described as positive feedback coupling to thermal fluctuations. Chaotic behavior was observed and this device behavior was utilized for the construction of a system to solve optimization problems such as the traveling salesmen problem.