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Alice Mizrahi3 Tifenn Hirtzlin2 Akio Fukushima4 Hitoshi Kubota4 Shinji Yuasa4 Mark Stiles3 Julie Grollier1 Damien Querlioz2

3, National Institute of Standards and Technology, Gaithersburg, Maryland, United States
2, C2N, Orsay, , France
4, National Institute of Advanced Industrial Science and Technology, Tsukuba, , Japan
1, CNRS/Thales, Palaiseau, , France

Using nanodevices is an exciting path for hardware implementation of compact and low power forms of computing. A critical challenge, however, is that at their smallest sizes, nanodevices tend to be stochastic and highly variable. The brain can be a source of inspiration for solving this issue as it computes using very low energy with components that are also stochastic and highly variable. Population coding is one method that seems to enable the brain to function in such conditions. In this paradigm, information (about an incoming stimulus for instance) is encoded in an assembly of neurons rather than a single neuron.
In this work, we draw an analogy between stochastic neurons and stochastic nanodevices, superparamagnetic tunnel junctions. We show that these devices can be used as artificial neurons in population-coding computing schemes.
Superparamagnetic tunnel junctions oscillate stochastically between two stable states with a given rate which depends on the electrical stimulus applied to the device. First, we demonstrate experimentally how the rates of a small population of superparamagnetic tunnel junctions can form a basis set of functions. This means that linear combinations of the individual rates can produce arbitrary non-linear functions, which is a powerful building block for computations. Then we use numerical simulations to show how two interconnected populations constitute a computing unit. The connecting synaptic weights are learned by trial and error, thus defining the transformation of information from the input to output populations. We show that this system is resilient to device variability and failure. We propose to use stable magnetic tunnel junctions to store the synaptic weights. Finally, we design the full architecture of the system, including the nanodevices and the CMOs circuits to interface them. We use standard circuit simulation tools to show that our system has low energy and low area consumption.

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