MA02.05.16 : Field-Plate Design Optimization for High-Voltage Organic Thin-Film Transistors

5:00 PM–7:00 PM Apr 4, 2018

PCC North, 300 Level, Exhibit Hall C-E

Andy Shih1 Akintunde Akinwande1

1, Massachusetts Institute of Technology, Cambridge, Massachusetts, United States

Design of a high-voltage organic thin film transistor (HVOTFT) with the addition of a bottom field plate have shown improvements in the critical and breakdown field via numerical simulation. Such a field plate can help push the boundaries of high-voltage operation in organic thin film transistors (OTFT) technology beyond a drain to source voltage (VDS) of 500 V while being controlled by a low gate to source voltage VGS. High-voltage operation is not well developed in OTFT technology, and would allow the integration of HVOTFTs with large electrostatic MEMS actuators or photovoltaic systems on glass. The HVOTFT is designed with a dual accumulation region and dual threshold voltage to minimize the electric field peak within the channel. The design is also compatible with low temperature processing, self-assembled monolayer treatments and organic semiconductor solution-processing, for low cost and flexible applications.