Tunnel Field Effect Transistors have the potential to reduce the power consumption in logic operating at very low off-state current levels and at moderate switching speed. Key metrics include a high on-state current with a high Ion/Ioff-ratio that needs to be combined with a low hysteresis. A low subthreshold slope combined with a high transconductance are needed to meet these requirements.
III-V nanowire Tunnel Field-Effect Transistors have demonstrated hysteresis-free operation of 48 mV dec with a Ion of 10 µA/µm for Vgs=0.3 V. Statistical analysis of a large number of transistors with subthermal operation show that the subthreshold slope mainly is limiting Ion for low Vds (0.1) while gm is limiting for higher Vds (0.3V). Enhancing the transistor performance is thus not only related to the subthreshold slope, but also the on-state performance is critical. III-V heterostructures offers an excellent opportunity based on the wide range of the combinations possible.
The understanding of how different defects contribute to the measured I-V characteristics is essential to identify routes to improve the performance. Bulk traps, interface states, and oxide defects all contribute in different ways, as well as the possible contribution from gap states formed around the band edges. The different contributions may be quantified by careful I-V spectroscopy, demonstrating that such defects can be controlled on a sufficient level for advantageous Tunnel Field-Effect operation.
This work is supported by the Swedish Foundation for Strategic Research and the Swedish Research Council.